sy89251v enhanced differential receiver micrel inc. ? 2180 fortune drive ? san jose, ca 95131 ? usa ? tel +1 ( 408 ) 944 - 0800 ? fax + 1 (408) 474 - 1000 ? http://www.micrel.com june 2010 m9999 - 060410-a hbwhelp@micrel.com or (408) 955 - 1690 general description the sy89251v is a differential pecl/ecl receiver/buffer in a space saving (2mm x 2mm) dfn package. the device is functionally equivalent to the sy100el16vc, except for an active high enable pin and a 70% smaller footprint. it is also equivalent to the sy89250v, except for an active high enable pin. it provides a v bb output for either single - ended application or as a dc bias for ac - coupling to the device. the sy89251v provides an en input which is synchronized with the data input (d) si gnal in a way that provides glitchless gating of the q hg and /q hg outputs. when the en signal is high, the input is passed to the outputs and the data output equals the data input. when the data input is high and the en goes low, it will force the q hg low and the /q hg high on the next negative transition of the data input. if the data input is low when the en goes low, the next data transition to a high is ignored and q hg remains low and /q hg remains high. the next positive transition of the data input is n ot passed on to the data outputs under these conditions. the q hg and /q hg outputs remain in their disabled state as long as the en input is held low. the en input has no influence on the /q output and the data input is passed on (inverted) to this output w hether en is high or low. this configuration is ideal for crystal oscillator applications, where the oscillator can be free running and gated on and off synchronously without adding extra counts to the output. datasheets and support documentation can b e fo und on micrel?s web site at: www.micrel.com . features ? 3.3v and 5v power supply options ? 250ps propagation delay ? very high voltage gain ? ideal for pulse amplifier and limiting amplifier applications ? data synchronous en able/disable (en) on q hg and /q hg provides for complete glitchless gating of the outputs ? ideal for gating timing signals ? complete solution for high quality, high frequency crystal oscillator applications ? available in an ultra - small 8 - pin (2mm x 2mm) dfn package applications ? oscillator modules ___________________________________________________________________________________________________________ block diagram
micrel, inc. sy89251v june 2010 2 m9999 - 060410-a hbwhelp@micrel.com or (408) 955 - 1690 ordering information (1) part number package type operating range package marking lead fin ish sy89251vmi dfn -8 industrial 251 sn -pb SY89251VMITR (2) dfn -8 industrial 251 sn -pb sy89251vmg dfn -8 industrial 251 with pb - free bar - line indicator pb - free nipdau sy89251vmgtr (2) dfn -8 industrial 251 with pb - free bar - line indicator pb - free nipdau not es: 1. contact factory for die availability. dice are guaranteed at t a = 25c, dc electricals only. 2. tape and reel. pin configuration 8 - pin dfn (ultra - small outline) truth table en qhg output 0 logic low 1 data pin description pin number p in name type pin function 1 /q 100k single - ended pecl/ecl feedback output. 2 d 100k single - ended pecl/ecl input: the signal input includes an internal 75k ? pull - down resistor. if input is left open, q output will default to low. 3 vbb reference output voltage bias voltage: v cc ? 1.3v. used as reference voltage when ac - coupling to the d in put. max sink/source current is 0.5ma. 4 en enable input en input which is synchronized with data input (d) signal in a way that provides glitchless gating of q hg and /q hg outputs. includes internal 75k ? pull - up resistor. default is high. 5 vee expose d pad negative power supply negative power supply: v ee and exposed pad must be tied to most negative supply. for pecl/lvpecl connect to ground. 6, 7 /qhg, qhg 100k differential pecl/ecl output: qhg defaults to low and /qhg defaults to high if d input is left open. see ?output interface applications? section for recommendations on terminations. 8 vcc positive power supply positive power supply: bypass with 0.1f//0.01f low esr capacitors as close to vcc pin as possible.
micrel, inc. sy89251v june 2010 3 m9999 - 060410-a hbwhelp@micrel.com or (408) 955 - 1690 absolute maximum ratings (1) po wer supply voltage (v cc ) ......................... ? 0.5v to +6.0v ecl input voltage (v in ) .............................. 0v to v cc +0.5v voltage applied to output at high state (v out ) ........................................................ ? 0.5v to v cc output current (i out ) continuous ............................................................ 50ma surge??????????????????..100ma lead temperature (soldering, 20 sec .) ...................... 260c storage temperature (t s ) ........................ ? 65c to +150c operating ratings (2) power supply voltage |v cc ? v ee | ............. 3.3v 10% or 5v 10% ambient temperature (t a ) .......................... ? 40c to +85c package thermal resistance, (3) dfn ( ja ) still - air ................................ ........................... 93c/w dfn ( jb ) ........................................................... 60c/w dc electrical characteristics (4) t a = ? 40c to +85c, unless noted. symbol parameter condition min typ max units v ee power supply |v cc ? v ee | |v cc ? v ee | 3.0 4.5 3.3 5.0 3.6 5.5 v v i ee power supply current 46 ma i il input low current en -150 a v bb output reference voltage v cc ? 1.38 v cc ? 1.32 v cc ? 1.26 v dc electrical characteristics (4) v cc = +3.3v 10% or +5v 10% and v ee = 0v; v cc = 0v and v ee = ? 3.3v 10% or ? 5v 10%; t a = ? 40c to +85c; unless n oted. symbol parameter condition min typ max units v oh output high voltage note 4 v cc ? 1.085 v cc ? 0.880 v v ol output low voltage note 4 v cc ? 1.830 v cc ? 1.555 v v ih input high voltage v cc ? 1.165 v cc ? 0.880 v v il input low voltage v cc ? 1.810 v cc ? 1.475 v v pp minimum input swing 150 mv i ih input high current d 150 a i il input low current d 0.5 a notes: 1. exceeding the absolute maximum rating may damage the device. 2. the device is not guaranteed to function outside its operating rating. 3. package thermal resistance assumes exposed pad is soldered (or equivalent) to the devices most negative potential on the pcb. 4. output loaded with 50 ? w r 9 cc ? 2v.
micrel, inc. sy89251v june 2010 4 m9999 - 060410-a hbwhelp@micrel.com or (408) 955 - 1690 ac electrical characteristics v ee = v ee (min) to v ee (max); v cc = gnd; t a = ? 40c to +85c; unless noted. symbol parameter condition min typ max units t pd propagation delay to: /q output d (dif f) d (se) 380 430 ps ps qhg, /qhg output d (diff) d (se) 730 780 ps ps t s set - up time en 150 ps t h hold time en 150 ps t skew duty cycle skew (diff) note 5 5 20 ps v pp minimum input swing note 6 150 mv v cmr common mode range note 7 - 1.3 - 0.4 v t r , t f output /q and qhg, /qhg rise/fall times (20% to 80%) at full output swing 100 225 350 ps notes: 5. duty cycle skew is the difference between a t pd propagation delay through a device. 6. minimum input swing for which ac parameters are guaranteed. the device has a dc gain of 40 to q, /q outputs and a dc gain o f 200 or higher to /q hg , q hg outputs. 7. the cmr range is referenced to the most positive side of the differential input signal. normal operation is obtained if the h igh level falls within the specified range and the peak - to - peak voltage lies between v pp (min) and 1 v. the lower end of the cmr range varies 1:1 with v ee . the numbers in the spec table assume a nominal v ee = ? 3.3v. note for pecl operation, the v cmr (min) will be fixed at 3.3v ? |v cmr (min)|. timing diagram
micrel, inc. sy89251v june 2010 5 m9999 - 060410-a hbwhelp@micrel.com or (408) 955 - 1690 output interface applications figure 1a . parallel thevenin - equivalent termination figure 1b. three resistor ?y? termination figure 1c . terminating unused i/o
micrel, inc. sy89251v june 2010 6 m9999 - 060410-a hbwhelp@micrel.com or (408) 955 - 1690 package information 8 - pin ultra - small epad - dfn
micrel, inc. sy89251v june 2010 7 m9999 - 060410-a hbwhelp@micrel.com or (408) 955 - 1690 pcb thermal consideration for 8 - pin dfn package package notes: 1. p ackaging meets leve 2 qualification. 2. all pasrts are dry - packaged before shipment. 3. exposed pads must be soldered to a ground for proper thermal management. micrel, inc. 2180 fortune drive san jose, ca 95131 usa tel +1 (408) 944 - 0800 fax +1 (408) 474 - 1000 web http://www.micrel.com the information furnished by micrel in this data sheet is believed to be accurate and reliable. however, no responsibility is assumed by micrel for its use. micrel reserves the right to change circuitry and specifications at any time without notification to the customer. micrel products are not designed or authorized for use as compon ents in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or ( b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. a purchaser?s use or sale of micrel products for use in life support appliances, devices or systems is a purchaser?s own risk and purchaser agrees to fully indemnify micrel for any damages resulting from such use or sale. ? 2009 micrel, incorporated.
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